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Rapid prototyping of digital systems sopc edition / James O. Hamblen, Tyson S. Hall, Michael D. Furman.

Por: Colaborador(es): Tipo de material: TextoTextoDetalles de publicación: New York : Springer, c2008Descripción: xvii, 411 p. : il. ; 26 cm. + 1 disco compacto (4 3/4 plg.)ISBN:
  • 0387726705
  • 9780387726700
Tema(s): Clasificación LoC:
  • TK 7895 .G36 H34
Contenidos:
Tutorial : the 15 minute design -- FPGA development board hardware and I/O features -- Programmable logic technology -- Tutorial sequential design and hierarchy -- FPGA acore library functions -- Using VHDL for synthesis of digital hardware -- Using Verilog for synthesis of digital hardware -- State machine design : the electric train controller -- A simple computer design : the uP 3 -- VGA video display generic using FPGAs -- Interfacing to the PS/2 keyboard and mouse -- Legacy digital I/O interfacing standards -- FPGA robotic projects -- A RISC design : synthesis of the MIPS processor core -- Introducing system on a programmable chip -- Tutorial III : Nios II processor software development -- Tutorial IV : Nios II processor hardware design -- Operating system support for SOPC design -- Appendix A. Generation of pseudo random binary sequences -- Appendix B. Quartus II design and data file extensions -- Appendix C. Common FPGA pin assignments -- Appendix D. ASCII character code -- Appendix E. Common I/O connector pin assignments
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Libros para consulta en sala Libros para consulta en sala Biblioteca Antonio Enriquez Savignac Biblioteca Antonio Enriquez Savignac COLECCIÓN RESERVA TK 7895 .G36 H34 (Navegar estantería(Abre debajo)) 1 No para préstamo Ing. Telematica 029125
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Para disco compacto véase: DC TK 7895 .G36 H34

Tutorial : the 15 minute design -- FPGA development board hardware and I/O features -- Programmable logic technology -- Tutorial sequential design and hierarchy -- FPGA acore library functions -- Using VHDL for synthesis of digital hardware -- Using Verilog for synthesis of digital hardware -- State machine design : the electric train controller -- A simple computer design : the uP 3 -- VGA video display generic using FPGAs -- Interfacing to the PS/2 keyboard and mouse -- Legacy digital I/O interfacing standards -- FPGA robotic projects -- A RISC design : synthesis of the MIPS processor core -- Introducing system on a programmable chip -- Tutorial III : Nios II processor software development -- Tutorial IV : Nios II processor hardware design -- Operating system support for SOPC design -- Appendix A. Generation of pseudo random binary sequences -- Appendix B. Quartus II design and data file extensions -- Appendix C. Common FPGA pin assignments -- Appendix D. ASCII character code -- Appendix E. Common I/O connector pin assignments

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  • Con tecnología Koha